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International Journal of Neural Network, 2025, 4(1); doi: 10.38007/NN.2025.040106.

Discussion on Low-Latency Computing Strategies in Real-Time Hardware Generation

Author(s)

Huijie Pan

Corresponding Author:
Huijie Pan
Affiliation(s)

Identity Department, PayPal Inc., San Jose, California, 95131, United States

Abstract

The rapid development of real-time hardware generation has led to low latency computing becoming one of the factors to improve system performance. This paper discusses the delay challenges in real-time hardware generation, including low efficiency of hardware resource scheduling, bandwidth limitation of data transmission, memory access bottleneck and insufficient collaborative optimization of hardware and software, and proposes to use dynamic scheduling to improve the efficiency of hardware resource use, upgrade the data transmission interface to improve bandwidth, and realize intelligent cache management to improve memory access speed. And deepen the hardware and software co-design to improve the running degree, effectively reduce the delay time, improve the comprehensive performance of real-time hardware generation.

Keywords

Low latency computing; Real-time hardware generation; Hardware resource scheduling

Cite This Paper

Huijie Pan. Discussion on Low-Latency Computing Strategies in Real-Time Hardware Generation. International Journal of Neural Network (2025), Vol. 4, Issue 1: 48-56. https://doi.org/10.38007/NN.2025.040106.

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